M.E. /B.Tech. in Computer Sc. & Engg. | PMP since 2005 | IIM-Bangalore EGMP 2009 batch
In semiconductor industry since 1996
Experience:
~8 Yrs of Design Closure [RTL/Netlist to GDSII] : 12+ SoCs (180-45nm), 3 TCs (28nm)
~2 Yrs of Package co-design : Wirebond and Flipchip
~2 Yrs of ...
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M.E. /B.Tech. in Computer Sc. & Engg. | PMP since 2005 | IIM-Bangalore EGMP 2009 batch
In semiconductor industry since 1996
Experience:
~8 Yrs of Design Closure [RTL/Netlist to GDSII] : 12+ SoCs (180-45nm), 3 TCs (28nm)
~2 Yrs of Package co-design : Wirebond and Flipchip
~2 Yrs of Software/Tools/Flows/Methodology developments
~2 Yrs of Library/IP Delivery Management
~3 Yrs of Program Mgmt. : Multi sites/domains and customers/suppliers
Specialties
Chip Planning, Design Closure, Physical Design, Die Size Reduction, Pin/Ball map, Package co-design, EDA/Flow, Team Building, Project Execution and Work on New Initiatives
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